Dr Gareth Roy
Gareth Roy recieved a B.Eng. in Electronics and Electrical Engineering in 1999 from the Dept. of Electronics and
Electrical Engineering at the University of Glasgow. He went on to complete a PhD in the Device Modelling Group at
the University of Glasgow in 2005, studying "Simulation of Intrinsic Parameter
Fluctuation in Nano-CMOS Device" under the supervision of Professor Asen Asenov a leading expert in the field
of variability in semiconductor devices.
He currently works as a Research Associate in the Device Modelling Group in the University of Glasgow were he has
been employed to develop numerical simulation codes to study the effects intrinsic parameter variability in CMOS
transistors. He has experience in developing parallel codes using MPI and OpenMP and experience in the modelling of
sources of variability in bulk CMOS transistors as well as Dynamic RAM and NVM cells.