1

B. Cheng, D. Dideban, N. Moezi, C. Millar, G. Roy, X. Wang, S. Roy and A. Asenov, "Statistical Variability Compact Modeling Strategies for BSIM4 and PSP," IEEE Design and Test of Computers, Vol. 27, No. 2, pp. 26–35, Mar./Apr. 2010.

2

U. Kovac, D. Dideban, B. Cheng, N. Moezi, G. Roy and A. Asenov, "A Novel Approach to the Statistical Generation of Non-normal Distributed PSP Compact Model Parameters using a Nonlinear Power Method," in Proc. Simulation of Semiconductor Processes and Devices (SISPAD), Bologna, Italy, Sept. 6-8, 2010, pp. 125–128.

3

A. Asenov, B. Cheng, D. Dideban, U. Kovac, N. Moezi, C. Millar, G. Roy, A. R. Brown and S. Roy, "Modeling and Simulation of Transistor and Circuit Variability and Reliability," Custom Integrated Circuit Conference: San Jose, California, Sept. 19-22, 2010.

4

B. Cheng, D. Dideban, N. Moezi, C. Millar, G. Roy, X. Wang, S. Roy and A. Asenov, "Capturing Intrinsic Parameter Fluctuations using the PSP Compact Model," in Proc. Design, Automation and Test in Europe, Dresden, Germany, Mar. 8-12, 2010, pp. 650–653.

5

B. Bindu, B. Cheng, G. Roy, X. Wang, S. Roy and A. Asenov, "Parameter set and data sampling strategy for accurate yet efficient statistical MOSFET compact model extraction," Solid-State Electronics, Vol. 54, No. 3, pp. 307–315, Mar. 2010.

6

A. R. Brown, J. R. Watling, G. Roy, C. Riddet, C. L. Alexander, U. Kovac, A. Martinez and A. Asenov, "Use of density gradient quantum corrections in the simulation of statistical variability in MOSFETs," Journal of Computational Electronics, Vol. 9, No. 3-4, pp. 187–196, 2010.

7

U. Kovac, C. L. Alexander, G. Roy, C. Riddet, B. Cheng and A. Asenov, "Hierarchical Simulation of Statistical Variability: From 3-D MC with ‘ab initio’ Ionized Impurity Scattering to Statistical Compact Models," IEEE Transactions on Electron Devices, 2010.

8

B. Cheng, N. Moezi, D. Dideban, G. Roy, S. Roy and A. Asenov, "Benchmarking the Accuracy of PCA Generated Statistical Compact Model Parameters Against Physical Device Simulation and Directly Extracted Statistical Parameters," in Proc. Simulation of Semiconductor Processes and Devices, Sept. 9-11, 2009, pp. 143–146.

9

A. Asenov, A. R. Brown, G. Roy, B. Cheng, C. L. Alexander, C. Riddet, U. Kovac, A. Martinez, N. Seoane and S. Roy, "Simulation of statistical variability in nano-CMOS transistors using drift-diffusion, Monte Carlo and non-equilibrium Green’s function techniques," Journal of Computational Electronics, Vol. 8, No. 3-4, pp. 349–373, 2009.

10

D. Reid, C. Millar, G. Roy, S. Roy and A. Asenov, "Statistical enhancement of combined simulations of RDD and LER variability: What can simulation of a 10^5 sample teach us?" International Electron Devices Meeting 2009: Dec. 7-9, 2009.

11

D. Reid, C. Millar, G. Roy, S. Roy and A. Asenov, "Efficient Simulations of 6σ VT Distributions Due to Random Discrete Dopants," Proc. ULIS 2009: Mar. 2009.

12

D. Reid, C. Millar, G. Roy, S. Roy and A. Asenov, "Understanding LER-induced Statistical Variability: A 35,000 Sample 3D Simulation Study," Proc. ESSDERC 2009: Sept. 14-18, 2009.

13

D. Reid, C. Millar, G. Roy, S. Roy and A. Asenov, "Analysis of Threshold Voltage Distribution due to Random Dopants: A 100,000 Sample 3D Simulation Study," IEEE Transactions on Electron Devices, Oct. 2009.

14

D. Reid, R. O. Sinnott, C. Millar, G. Roy, S. Roy and G. Stewart, "Enabling Cutting-edge Semiconductor Simulation through Grid Technology," Journal of the Philosophical Transactions of the Royal Society A, January 2009. Jan. 2009.

15

D. Reid, S. Roy, C. Millar, G. Roy, R. O. Sinnott, G. Stewart and A. Asenov, "Supporting Statistical Semiconductor Analysis using EGEE and OMII-UK Middleware," EGEE 3rd User Forum: Feb. 2008.

16

D. Reid, C. Millar, S. Roy, G. Roy, R. O. Sinnott, G. Stewart, G. Stewart and A. Asenov, "An Accurate Statistical Analysis of Random Dopant Induced Variability in 140,000 13nm MOSFETs," Silicon Nanoelectronics Workshop 2008: June 15-16, 2008.

17

C. L. Alexander, G. Roy and A. Asenov, "Random-Dopant-Induced Drain Current Variation in Nano-MOSFETs: A Three-Dimensional Self-Consistent Monte Carlo Simulation Study Using "ab initio" Ionized Impurity Scattering," IEEE Trans. Electron Devices, Vol. 55, No. 11, pp. 3251–3258, Nov. 2008.

18

B. Bindu, B. Cheng, G. Roy, X. Wang, S. Roy and A. Asenov, "An efficient data sampling strategy for statistical parameter extraction of nano-MOSFETs," IEEE Workshop on Compact Modeling: Sept. 8-8, 2008.

19

A. Asenov, S. Roy, A. R. Brown, G. Roy, C. L. Alexander, C. Riddet, C. Millar, B. Cheng, A. Martinez, N. Seoane, D. Reid, M. Faiz. Bukhori, X. Wang and U. Kovac, "Advanced simulation of statistical variability and reliability in nano CMOS transistors," in Proc. IEDM, USA, Dec. 2008, p. 421.

20

D. Reid, C. Millar, S. Roy, G. Roy, R. O. Sinnott, G. Stewart, G. Stewart and A. Asenov, "Enabling Cutting-Edge Semiconductor Simulation through Grid Technology," All Hands Meeting 2008: Sept. 2008.

21

C. Millar, D. Reid, G. Roy, S. Roy and A. Asenov, "Accurate Statistical Description of Random Dopant Induced Threshold Voltage Variability," IEEE Electron Device Letters, Vol. 29, No. 8, pp. 946–948, Aug. 2008.

22

R. O. Sinnott, A. Asenov, C. Bayliss, C. Davenhall, T. Doherty, B. Harbulot, M. Jones, D. Martin, C. Millar, G. Roy, S. Roy, G. Stewart and J. Watt, "Integrating Security Solutions to Support nanoCMOS Electronics Research," IEEE International Symposium on Parallel and Distributed Processing Systems with Applications: Sydney, Australia, Dec. 2008.

23

R. O. Sinnott, A. Asenov, C. Millar, D. Berry, B. Harbulot, D. Reid, G. Roy, S. Roy and G. Stewart, "Meeting the Design Challenges of nanoCMOS Electronics through Secure, Large-scale Simulation and Data Management," EGEE User Conference: Istanbul Turkey, Oct. 2008.

24

R. O. Sinnott, C. Bayliss, C. Millar, G. Stewart, G. Roy, S. Roy, D. Reid, B. Harbulot, C. Davenhall, A. Asenov and J. Watt, "Secure, Performance-Oriented Data Management for nanoCMOS Electronics," in Proc. e-Science 2008 Conference, Indiana, USA,

25

D. Reid, C. Millar, A. Asenov, S. Roy, G. Roy, R. O. Sinnott and G. Stewart, "Supporting Statistical Semiconductor Device Analysis using EGEE and OMII-UK Middleware," EGEE User Conference: Clermont-Ferrand, France, Feb. 2008.

26

U. Kovac, D. Reid, C. Millar, G. Roy, S. Roy and A. Asenov, "Statistical simulation of random dopant induced threshold voltage fluctuations for 35 nm channel length MOSFET," Microelectronics Reliability, Vol. 48, No. 8-9, pp. 1572–1575, 2008.

27

S. Markov, A. R. Brown, B. Cheng, G. Roy, S. Roy and A. Asenov, "Three-dimensional statistical simulation of gate leakage fluctuations due to combined interface roughness and random dopants," Japanese Journal of Applied Physics Part 1-Regular Papers Brief Communications & Review Papers, Vol. 46, No. 4B, pp. 2112–2116, 2007.

28

A. R. Brown, G. Roy and A. Asenov, "Poly-Si Gate Related Variability in Decananometre MOSFETs with Conventional Architecture," IEEE Trans. Electron Dev. Vol. 54, No. 11, pp. 3056–3063, 2007.

29

L. Han, R. O. Sinnott, G. Stewart, A. Asenov, S. Roy, G. Roy, C. Millar and D. Berry, "Towards a Grid-Enabled Simulation Framework for Nano-CMOS Electronics," IEEE e-Science 2007 Conference: 2007.

30

R. O. Sinnott, A. Asenov, A. R. Brown, C. Millar, S. Roy, G. Roy and G. Stewart, "Grid Infrastructures for the Electronics Domain: Requirements and Early Prototypes from an EPSRC Pilot Project," in Proc. UK e-Science All Hands Meeting, Nottingham, UK, 2007, pp. 509–516.

31

T. D. Drysdale, A. R. Brown, S. Roy, G. Roy and A. Asenov, "Capacitance variability of short range interconnects," Journal of Computational Electronics, Dec. 2007.

32

T. D. Drysdale, A. R. Brown, G. Roy, S. Roy and A. Asenov, "Interconnect variability within standard cells," 12th International Workshop on Computational Electronics: Oct. 8-10, 2007.

33

A. R. Brown, G. Roy and A. Asenov, "Impact of Fermi level pinning at polysilicon gate grain boundaries on nano-MOSFET variability: A 3-D simulation study," in Proc. 36th European Solid-State Device Research Conference (ESSDERC), Montreux, Switzerland, Sept. 19-21, 2006, pp. 451–454.

34

B. Cheng, S. Roy, G. Roy, A. R. Brown and A. Asenov, "Design Consideration of 6-T SRAM towards the End of Bulk CMOS Technology Scaling Subjected to Random Dopant Fluctuation," in Proc. Proc 36th European Solid-State Device Research Conference (ESSDERC),

35

C. L. Alexander, G. Roy and A. Asenov, "Increased intrinsic parameter fluctuations through ab initio Monte Carlo simulations in nano-scaled MOSFETs," in Proc. International Electron Devices Meeting 2006, ser. International Electron Devices Meeting 2006, IEDM, San Fransisco, CA, USA, Dec. 11-13, 2006,

36

A. Asenov, A. R. Brown, G. Roy, C. L. Alexander and A. Martinez, "Simulation of Atomic Scale Effects and Fluctuations in nano-scale CMOS," in Proc. Solid-State Devices and Materials (SSDM), Yokohama, Japan, Sept. 12-15, 2006, pp. 358–359.

37

A. Asenov, A. R. Brown, B. Cheng, J. R. Watling, G. Roy and C. L. Alexander, "Simulation of nano-CMOS devices: from atoms to architecture," in Nanotechnology for Electronic Materials and Devices, A. Korkin, J. Labanowski, E. Gusev and S. Luryi, Eds. New York: Springer, 2006, pp. 257–303.

38

G. Roy, A. R. Brown, F. Adamu-Lema, S. Roy and A. Asenov, "Simulation study of individual and combined sources of intrinsic parameter fluctuations in conventional nano-MOSFETs," IEEE Transactions on Electron Devices, Vol. 53, No. 12, pp. 3063–3070, 2006.

39

G. Roy, A. R. Brown, F. Adamu-Lema, S. Roy and A. Asenov, "Intrinsic Parameter Fluctuations in Conventional MOSFETs until end of the ITRS," Journal of Physics Conferences Series, Vol. 38, pp. 188–191, 2006.

40

S. Markov, A. R. Brown, B. Cheng, G. Roy, S. Roy and A. Asenov, "3D statistical simulation of gate leakage fluctutations due to combined interface roughness and random dopants," in Proc. Solid-State Devices and Materials (SSDM), Yokohama, Japan, Sept. 12-15, 2006, pp. 362–363.

41

B. Cheng, S. Roy, G. Roy, F. Adamu-Lema and A. Asenov, "Impact of intrinsic parameter fluctuations in decanano MOSFETs on yield and functionality of SRAM cells," Solid-State Electronics, Vol. 49, No. 5, pp. 740–746, 2005.

42

G. Roy, F. Adamu-Lema, A. R. Brown, S. Roy and A. Asenov, "Intrinsic parameter fluctuations in conventional MOSFETs until the end of the ITRS," ser. New Phenomena in Mesoscopic Structures - 7 (NPMS) and the fifth in the series of Surfaces and Interfaces of Mesoscopic Devices (SIMD), NPMS-7/ SIMD-5,

43

G. Roy, F. Adamu-Lema, A. R. Brown, S. Roy and A. Asenov, "Simulation of combined sources of intrinsic parameter fluctuations in 'real' 35nm MOSFET," ser. European Solid-State Device Research Conference 2005 - ESSDERC2005, Grenoble, France,

44

A. Asenov, G. Roy, C. L. Alexander, A. R. Brown, J. R. Watling and S. Roy, "Quantum mechanical and transport aspects of resolving discrete charges in nano-CMOS device simulation," in Proc. 4th IEEE Conference on Nanotechnology (IEEE Nano), Munich, Germany, Aug. 17-19, 2004, pp. 334–336.

45

F. Adamu-Lema, S. Roy, A. R. Brown, A. Asenov and G. Roy, "Intrinsic parameter fluctuations in conventional MOSFETs at the scaling limit: a statistical study," in Proc. 10th International Workshop on Computational Electronics (IWCE), West Lafayette, IN, USA, Oct. 24-27, 2004, pp. 44–45.

46

F. Adamu-Lema, G. Roy, A. R. Brown, A. Asenov and S. Roy, "Intrinsic parameter fluctuations in conventional MOSFETs at the scaling limit:a statistical study," J. Computational Electronics, Vol. 3, pp. 203–206, 2004.