Karol KALNA EPSRC Advanced Research Fellow and Member of Device Modelling Group email: kalna(at)elec.gla.ac.uk phone: 0141 330 6010
		III-V MOSFETs Device simulator (DevMod Group Seminars) Professional CV PhD Thesis Publications
		The SI and derived units Numerical codes in Fortran 90 Badminton court School Project Private Photos

Click to enlarge The cross-section of the proposed III-V MOSFET simulated with the MC/MOS.

The core tool of my device modelling research is a finite element ensemble Monte Carlo device simulator (MC/H2F) which was originally developed to investigate electron transport properties in compound FETs. Later, the code has been rewritten to deal with a MOSFET structure including oxide layer and analytical or imported doping profiles. The new Monte Carlo device simulator for the MOSFET (MC/MOS) includes self-consistent calculations of the Fermi energy and electron temperature used for ionized impurity scattering and degeneracy (Fermi exclusion principle), interface roughness scattering and quantum confinement effect using the effective potential. Using this new Monte Carlo simulator, we have proposed to use III-V materials for MOSFETs when scaled into deep sub-100 nm dimensions in 2002. This was followed up by the first III-V MOSFET grant "Sub 100 nm III-V MOSFETs for Digital Applications" supported by EPSRC in 2003. Based on the success of the grant, we have secured its continuation, the second III-V MOSFET grant "III-V MOSFETs for Ultimate CMOS" from EPSRC in 2007 and a FP7 STREP project DUALLOGIC funded by EC.

The Monte Carlo simulator MC/H2F was intensivelly employed to forecast a performance of HEMTs scaled into deep sub-100 nm dimensions. The typical pseudomorphic high electron mobility transistor simulated using Monte Carlo device simulator has a T-shaped gate; a 30-nm heavily Si-doped 4x1018 cm-3 n+ GaAs cap layer; an Al0.3 Ga0.7As etchstop layer; a 7x1012 cm-2 Si delta doped layer on top of an Al0.3 Ga0.7As spacer layer and, finally, an In0.2Ga0.8As channel. The whole device structure is grown on top of a 50-nm GaAs buffer. The finite element heterostructure ensemble Monte Carlo device simulator uses quadrilateral finite elements to depict a complex geometry of the HEMTs or MOSFETs and accurately calculates electrostatic effects caused by the gate and recess geometry as well as the surface potential pinning. It is capable of precisely reproducing a T-shape gate and recess formation in the device. The Monte Carlo module includes electron scattering with polar optical phonons; inter- and intra-valley non-polar optical phonons; acoustic phonons; and ionized and neutral impurity scattering. In addition, alloy scattering and strain effects are considered in the InGaAs channel of the device.

Click to enlarge The cross-section of pseudomorphic high electron mobility transistor simulated with the MC/H2F.